1. Field of the Invention
The present invention relates to the field of semiconductor devices. More particularly, the present invention relates to a method and apparatus for preventing plasma induced damage that results from high density plasma deposition processes.
2. Related Art
In conventional in Complimentary Metal Oxide Semiconductor (CMOS) device fabrication processes, semiconductor devices are formed on a semiconductor substrate using a thin gate oxide layer that forms gates between conductive regions in the semiconductor substrate. Overlying metal interconnect structures provide for electrical connection to the underlying semiconductor devices.
As semiconductor devices continue to be reduced in size, fabrication process have evolved that use ultra-thin gate oxide layers. These ultra-thin gate oxide layers are desirable for forming semiconductor devices having sizes smaller than 0.18 microns. However, one problem that arises in the fabrication of sub 0.18 micron semiconductor devices is that high density plasma deposition processes can damage the underlying ultra-thin gate oxide layer, leading to device failures. More particularly, when a high density plasma deposition process is performed over a metal interconnect structure, plasma charge is conveyed through the metal interconnect structure to the underlying devices, damaging the thin gate oxide layer and resulting in device failure.
As CMOS processes continue to scale down, the deposition-to-sputter ratio of high density plasma chemical vapor deposition processes has to be further reduced in order to deliver a void-free dielectric layer. However, deposition with low deposition-to-sputter ratio can generate non-uniform plasma and can cause radiation damage to underlying semiconductor devices.
Recent semiconductor fabrication processes have used a Un-doped Silica Glass(USG) liner that is deposited immediately before high density plasma deposition processes to protect the underlying devices from high density plasma related damage. However, it is difficult to optimize the thickness of the pre-deposited liner. A thin liner is not sufficient to protect the underlying gate oxide from high density plasma related damage. A thick liner is effective for preventing charging damage, but strongly reduces the gap-fill capability of the high density plasma deposition process. Therefore, it is difficult to obtain a USG liner that is effective for protecting the metal interconnect from plasma charge and that does not significantly reduce the gap-fill capabilities of the high density plasma deposition process. Thus, plasma related damage often occurs in spite of the use of a USG liner(e.g., as a result of nonuniformities in the USG liner or as a result of corner clipping).
What is needed is a method and apparatus for preventing plasma induced damage resulting from high density plasma deposition processes. In addition, a method and apparatus is needed for preventing plasma induced damage to the ultra-thin gate oxide of the underlying devices. In addition, a method and apparatus is needed that is suitable for sub 0.18 micron fabrication processes. Moreover, a method and apparatus is needed that does not reduce the gap-fill capability of the high density plasma deposition process. The present invention provides a solution to the above needs.